In a computing device, such as a laptop or desktop computer, smart phone, gaming device, etc., a communications bus may be implemented between various integrated circuit wafers that form the computing device. The communications bus may enable a system designer, for example, to verify operations and to troubleshoot functions of the integrated circuits that form the computing device. In one integration scenario, a designer may incrementally add an integrated circuit to a circuit board and then utilize a communications bus to confirm operation of the newly-added integrated circuit. A communications bus that exemplifies such capabilities may be the inter-integrated circuit bus, which may be abbreviated as “IIC” or “I2C,” developed by the Philips company (i.e., Koninklijke Philips N.V.) of Amsterdam, Netherlands, for example, although other varieties of communications buses may be utilized to provide such capabilities.
However, under certain modes of operation, such as operation of the communications bus at increased voltages or increased speed, or a combination thereof, driver circuits of the communications bus may undergo increased electrical stress. Such increased electrical stress may be brought about especially when driver circuits are pushed to provide output signal waveforms that comply with strict criteria. Forcing driver circuitry to operate in accordance with these criteria may give rise to reduced operating life, for example, which may result in degraded operation of a communications bus. In other instances, increased electrical stress may bring about complete failure of a communications bus well before expiration of its expected lifespan. Thus, providing techniques and/or circuitry that may operate to reduce electrical stress on driver circuitry of a communications bus, operating in accordance with strict criteria, continues to be an active area of investigation.
Reference is made in the following detailed description to accompanying drawings, which form a part hereof, wherein like numerals may designate like parts throughout that are corresponding and/or analogous. It will be appreciated that the figures have not necessarily been drawn to scale, such as for simplicity and/or clarity of illustration. For example, dimensions of some aspects may be exaggerated relative to others. Further, it is to be understood that other embodiments may be utilized. Furthermore, structural and/or other changes may be made without departing from claimed subject matter. References throughout this specification to “claimed subject matter” refer to subject matter intended to be covered by one or more claims, or any portion thereof, and are not necessarily intended to refer to a complete claim set, to a particular combination of claim sets (e.g., method claims, apparatus claims, etc.), or to a particular claim. It should also be noted that directions and/or references, for example, such as up, down, top, bottom, and so on, may be used to facilitate discussion of drawings and are not intended to restrict application of claimed subject matter. Therefore, the following detailed description is not to be taken to limit claimed subject matter and/or equivalents.